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Switching and Substrate Noise
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Signal Integrity
David Cavalheiro
Ultra-low Power Circuits based on Tunnel FETs for Energy Harvesting Applications, May 19, 2017.
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PhD Graduates
Marc Manel Molina García
Analysis of the High Frequency Substrate Noise Effects on LC-VCOs. January 29, 2016.
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Lancelot García Leyva
Metodología de diseño lógico redundante para escenarios con ruido extremadamente alto y bajo voltaje de alimentación. January 19, 2016.
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PhD Graduates
Joan Mauricio Ferré
Monitor amb control strategies to reduce the impact of Process Variations in digital circuits, December 12, 2015
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Peyman Pouyan
Reliability-Aware Memory Design Using Advanced Reconfiguration Mechanisms, November 16, 2015
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Manel Escudero
"Reliability-aware circuit design to mitigate impact of device defects and variability in emerging memristor-based applications", May 2020
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TRAMS (FP7) (2010-2012)
Technology projections indicate that future electronic devices will keep shrinking, being faster and consuming less energy per operation. In the next decade, a single chip will be able to perform trillions of operations per second and provide trillions of bytes per second in off-chip bandwidth. This is the so called Terascale Computing era, where terascale performance will be mainstream, available in personal computer, and being the building block of large data centers with petascale computing capabilities. However, these smaller devices will be much more susceptible to faults and its performance will exhibit a significant degree of variability...
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Energy harvesting from Human Passive Power
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Xavier Aragones
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