DESIGN AND TEST PRINCIPLES FOR TERASCALE INTEGRATED SYSTEMS

Funding entity: Spanish MICINN (Ministerio de Ciencia e Innovación

Period: 2009-2013

Description:

CMOS semiconductor technology is nowadays the dominant technology for integrated circuit

manufacturing, and it is expected that it will continue to be so for the next five years. However, the

continuing trends of device scaling and increase in complexity towards terascale system on chip level

of integration are putting growing difficulties into several areas of design and test of integrated circuits.

Manufacturing difficulties and yield loss translate into new challenges for designers that need to

address such problems, unlike past approaches when those problems were dealt with exclusively after

design. This new scenario will be increasingly important as CMOS devices reach their ultimate limits,

and will remain important as new emergent devices start to replace them in new beyond-CMOS

technologies. This project addresses such limitations and their profound impact on design and test

methodologies, focusing in two critical areas of system design: digital processing and wireless

communication circuits. The project targets its objectives on two areas with 2 and 3 objectives

• Design and test of digital processing systems
• New principles of digital design with imperfect components.
• Investigation on new Test and Fault Tolerant schemes oriented to such technology circuits.
• Design and test of wireless communication systems.
• Innovative solutions to provide RF circuits with self-calibrating capabilities in order to minimize the effects of PVT variations on their performance.
• Modelling and optimization of passive components for wireless transceivers in mm-wave frequencies.
• Development of new test/characterization strategies based in temperature measurements

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