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Failure analysis

Coordinator:
Antonio Rubio
Team:
Antonio Rubio, Jaume Segura, José Luis González
Description:
The presence of random spot defects is inherent with nowadays silicon circuits manufacturation. Test is the procedure to detect defective devices. The trend of 0% defects in circuits requires important efforts in the area of testing. In order to have a good test quality it is necessary to know the source, nature and behaviors of realistic defects.

This group is active in the area of failure analysis, modeling and impact on test generation and quality. The efforts have been dedicated to the analysis of failures as the floating gate (break of gate lines), shorts (undesired metal spots in photolithographic process) and gate oxide short (appeared in both the manufacturing and in the life of the circuit)